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dewfpga

Your code. Your board. From your Mac.

built by Damla Su Bilge · nosey-dewdrop.github.io/dewfpga

what it is

Write SystemVerilog on an Apple Silicon Mac and flash a Digilent Basys3. No Vivado, no virtual machine, no Rosetta. Use your own editor and your own design; labs are examples.

Vivado has no macOS build, so the five open-source tools that cover a CS223 lab were stood up by hand on Apple Silicon.

how it works

Save a .sv file anywhere and open it in VS Code. Click ▶ Run on Basys3 in the editor's upper-right corner. Connect the board through its PROG USB port and turn it on. No project folder, tasks file or pin file is needed for standard Basys3 IO. Other editors use the same CLI: dewfpga run my_design.sv.

Automatic pins recognize clk (100 MHz), sw[15:0], led[15:0], btnC, btnU, btnD, btnL, btnR, seg[6:0], dp and an[3:0]. Inside a Vivado project, Run builds the project: its files, its top, its .xdc.

No board and no install? The Basys3 simulator runs your design in the browser, and the testbench runner runs your testbench with a waveform.

what it installs

Vivado does five jobs in one window; five open-source tools do them here and install.sh wires them together.

why a script

Setting this chain up by hand took six hours. Six walls, none documented in one place:

1. oss-cad-suite has no nextpnr-xilinx. It must be built from source.
2. Apple clang has no -fopenmp. nextpnr needs -DUSE_OPENMP=OFF.
3. PEP 668. pip install into Homebrew Python is refused; a venv is required.
4. prjxray needs --recursive. Without it yaml-cpp, googletest and abseil are missing and cmake fails.
5. cmake 4 rejects prjxray. It needs -DCMAKE_POLICY_VERSION_MINIMUM=3.5.
6. No prebuilt chipdb. It is generated per device with bbaexport.py + bbasm.

measured

On an M2 with 8 GB: clean install 3 min 37 s to 4 min 17 s (three runs), about 0.3 GB on disk, bit in 4.6 s with a peak of 552 MB RAM. On the board, five designs: the blink template, switches to LEDs, the Lab 2 adder/subtractor, the display counter and the traffic-light FSM, each built with dewfpga flash.

scope

• Board: Digilent Basys3 (XC7A35T-1CPG236C) only.
• Platform: macOS arm64. Intel Mac and Linux are untested and refused by the script.
• flash writes SRAM: the design is gone after a power cycle.
• For coding agents, check, sim, bit and flash accept --json, and dewfpga mcp serves agent tools over standard input/output.

stack

SystemVerilog · Yosys · nextpnr-xilinx · prjxray · Icarus Verilog · openFPGALoader · Bash · C

links

• nosey-dewdrop.github.io/dewfpga
• patch notes
• docs
• error catalog
• simulator
• github